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Compute-heavy statistical models and deep learning capabilities have demonstrated tremendous improvements in enabling modern chip fabrication. This webinar will focus on how these improvements were achieved without compromising manufacturing throughput and infrastructure costs.
Thought leaders, Engineering Managers & above
Time | Session AGENDA CONSTRUCTS |
10:00 AM – 10:05 AM | Log in & Technical Checks |
10:05 AM – 10:10 AM | Welcome Note and Context setting |
10:10 AM – 10:55 AM | Presentation by Saravanan Paramasivam, Principal Manager, Algorithm Research and Development, KLA |
10:55 AM – 11:15 AM | Fireside chat |
11:15 AM – 11:25 AM | Q&A |
11:25 AM – 11:30 AM | Session Closure |